/haiku/src/add-ons/kernel/drivers/ports/usb_serial/ |
H A D | Silicon.cpp | 64 return WriteConfig(ENABLE_UART, &enableUart, 2); 72 status_t result = WriteConfig(SET_BAUDRATE_DIVIDER, ÷r, 2); 99 return WriteConfig(SET_LINE_FORMAT, &data, 2); 111 return WriteConfig(SET_STATUS, &control, 2); 115 status_t SiliconDevice::WriteConfig(CP210XRequest request, uint16_t* data, function in class:SiliconDevice
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H A D | WinChipHead.h | 94 status_t WriteConfig(uint16 dataRate, uint8 lcr, uint8 mcr);
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H A D | WinChipHead.cpp | 89 status = WriteConfig(fDataRate, fStatusLCR, fStatusMCR); 172 status_t status = WriteConfig(fDataRate, fStatusLCR, fStatusMCR); 175 TRACE_ALWAYS("= WCHDevice::SetLineCoding(): WriteConfig failed\n"); 218 WCHDevice::WriteConfig(uint16 dataRate, uint8 lcr, uint8 mcr) function in class:WCHDevice 227 TRACE_ALWAYS("= WCHDevice::WriteConfig(): datarate request failed: 0x%08x\n", 238 TRACE_ALWAYS("= WCHDevice::WriteConfig(): LCR request failed: 0x%08x\n", 248 TRACE_ALWAYS("= WCHDevice::WriteConfig(): handshake failed: 0x%08x\n", status);
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H A D | Silicon.h | 218 status_t WriteConfig(CP210XRequest request, uint16_t* data,
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/haiku/src/add-ons/kernel/bus_managers/pci/ |
H A D | pci_fixup.cpp | 71 pci->WriteConfig(domain, bus, device, function, 0x40, 4, val); 78 pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq); 124 pci->WriteConfig(domain, bus, device, function, PCI_command, 2, 127 pci->WriteConfig(domain, bus, device, function, 0x24, 4, 0xffffffff); 130 pci->WriteConfig(domain, bus, device, function, 0x24, 4, 0); 136 pci->WriteConfig(domain, bus, device, function, 0x90, 1, map); 138 pci->WriteConfig(domain, bus, device, function, 0x24, 4, 0xffffffff); 141 pci->WriteConfig(domain, bus, device, function, 0x24, 4, 0); 146 pci->WriteConfig(domain, bus, device, function, 0x24, 4, bar5); 148 pci->WriteConfig(domai [all...] |
H A D | pci.cpp | 71 gPCI->WriteConfig(domain, bus, device, function, offset, size, value); 842 WriteConfig(domain, bus, dev, function, PCI_command, 2, pcicmd); 845 WriteConfig(domain, bus, dev, function, PCI_primary_bus, 1, 0); 846 WriteConfig(domain, bus, dev, function, PCI_secondary_bus, 1, 0); 847 WriteConfig(domain, bus, dev, function, PCI_subordinate_bus, 1, 0); 891 WriteConfig(domain, bus, dev, function, PCI_primary_bus, 1, bus); 892 WriteConfig(domain, bus, dev, function, PCI_secondary_bus, 1, 894 WriteConfig(domain, bus, dev, function, PCI_subordinate_bus, 1, 255); 900 WriteConfig(domain, bus, dev, function, PCI_command, 2, pcicmd); 914 WriteConfig(domai 1605 PCI::WriteConfig(uint8 domain, uint8 bus, uint8 device, uint8 function, function in class:PCI 1628 PCI::WriteConfig(PCIDev *device, uint16 offset, uint8 size, uint32 value) function in class:PCI [all...] |
H A D | pci_device.cpp | 115 gPCI->WriteConfig(device->device, offset, size, value);
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H A D | pci.h | 100 status_t WriteConfig(uint8 domain, uint8 bus, uint8 device, 103 status_t WriteConfig(PCIDev *device, uint16 offset,
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/haiku/src/add-ons/kernel/busses/pci/x86/ |
H A D | X86PCIController.h | 36 virtual status_t WriteConfig( 76 status_t WriteConfig( 94 status_t WriteConfig( 112 status_t WriteConfig(
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H A D | X86PCIController.cpp | 216 X86PCIControllerMeth1::WriteConfig( function in class:X86PCIControllerMeth1 301 X86PCIControllerMeth2::WriteConfig( function in class:X86PCIControllerMeth2 382 X86PCIControllerMethPcie::WriteConfig( function in class:X86PCIControllerMethPcie 388 return X86PCIControllerMeth1::WriteConfig(bus, device, function, offset, 392 return fECAMPCIController.WriteConfig(bus, device, function, offset, size, value);
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H A D | kernel_interface.cpp | 37 ->WriteConfig(bus, device, function, offset, size, value);
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/haiku/src/add-ons/kernel/busses/pci/designware/ |
H A D | kernel_interface.cpp | 37 ->WriteConfig(bus, device, function, offset, size, value);
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H A D | DWPCIController.h | 198 status_t WriteConfig(
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H A D | DWPCIController.cpp | 349 DWPCIController::WriteConfig(uint8 bus, uint8 device, uint8 function, function in class:DWPCIController
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/haiku/src/add-ons/kernel/busses/pci/ecam/ |
H A D | kernel_interface.cpp | 38 ->WriteConfig(bus, device, function, offset, size, value);
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H A D | ECAMPCIController.h | 99 status_t WriteConfig(
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H A D | ECAMPCIController.cpp | 202 ECAMPCIController::WriteConfig(uint8 bus, uint8 device, uint8 function, function in class:ECAMPCIController
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