Searched refs:WRITE_IB_REG (Results 1 - 5 of 5) sorted by relevance

/haiku/src/add-ons/accelerants/radeon/
H A Dpalette.c29 WRITE_IB_REG( RADEON_DAC_CNTL2,
33 WRITE_IB_REG( RADEON_PALETTE_INDEX, 0 );
36 WRITE_IB_REG( RADEON_PALETTE_DATA, (i << 16) | (i << 8) | i );
89 WRITE_IB_REG( RADEON_DAC_CNTL2,
93 WRITE_IB_REG( RADEON_PALETTE_INDEX, first );
96 WRITE_IB_REG( RADEON_PALETTE_DATA,
H A DAcceleration.c404 WRITE_IB_REG( RADEON_RB3D_CNTL, 0 );
431 WRITE_IB_REG( RADEON_DEFAULT_OFFSET, pitch_offset );
432 WRITE_IB_REG( RADEON_DST_PITCH_OFFSET, pitch_offset );
433 WRITE_IB_REG( RADEON_SRC_PITCH_OFFSET, pitch_offset );
435 WRITE_IB_REG( RADEON_DEFAULT_SC_BOTTOM_RIGHT,
439 WRITE_IB_REG( RADEON_DP_GUI_MASTER_CNTL,
452 WRITE_IB_REG( RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff);
453 WRITE_IB_REG( RADEON_DP_BRUSH_BKGD_CLR, 0x00000000);
454 WRITE_IB_REG( RADEON_DP_SRC_FRGD_CLR, 0xffffffff);
455 WRITE_IB_REG( RADEON_DP_SRC_BKGD_CL
[all...]
H A DEngineManagment.c72 WRITE_IB_REG( RADEON_RB2D_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL );
75 WRITE_IB_REG( RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN |
79 WRITE_IB_REG( RADEON_SCRATCH_REG0, ai->si->engine.count );
H A DCP.h81 #define WRITE_IB_REG( reg, value ) \ macro
H A Doverlay.c1012 WRITE_IB_REG( RADEON_OV0_VID_BUF0_BASE_ADRS, offset);
1015 WRITE_IB_REG( RADEON_OV0_AUTO_FLIP_CNTRL, si->overlay_mgr.auto_flip_reg );

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