Searched refs:WREG32_RCU (Results 1 - 3 of 3) sorted by relevance
/linux-master/drivers/gpu/drm/radeon/ |
H A D | sumo_smc.c | 78 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), 82 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), 86 WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4), 120 WREG32_RCU(RCU_ALTVDDNB_NOTIFY, param); 154 WREG32_RCU(RCU_GNB_PWR_REP_TIMER_CNTL, timer_value); 155 WREG32_RCU(RCU_BOOST_MARGIN, pi->sys_info.sclk_dpm_boost_margin); 156 WREG32_RCU(RCU_THROTTLE_MARGIN, pi->sys_info.sclk_dpm_throttle_margin); 157 WREG32_RCU(GNB_TDP_LIMIT, pi->sys_info.gnb_tdp_limit); 158 WREG32_RCU(RCU_SclkDpmTdpLimitPG, pi->sys_info.sclk_dpm_tdp_limit_pg); 202 WREG32_RCU(regoffse [all...] |
H A D | sumo_dpm.c | 183 WREG32_RCU(RCU_PWR_GATING_SEQ0, 0x10103210); 184 WREG32_RCU(RCU_PWR_GATING_SEQ1, 0x10101010); 186 WREG32_RCU(RCU_PWR_GATING_SEQ0, 0x76543210); 187 WREG32_RCU(RCU_PWR_GATING_SEQ1, 0xFEDCBA98); 198 WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl); 203 WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl); 208 WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl); 213 WREG32_RCU(RCU_PWR_GATING_CNTL_4, rcu_pwr_gating_cntl); 216 WREG32_RCU(RCU_PWR_GATING_CNTL_5, 0xA02); 228 WREG32_RCU(RCU_PWR_GATING_CNT [all...] |
H A D | radeon.h | 2521 #define WREG32_RCU(reg, v) r600_rcu_wreg(rdev, (reg), (v)) macro
|
Completed in 306 milliseconds