Searched refs:VTD_PAGE_SHIFT (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/iommu/intel/
H A Diommu.h33 #define VTD_PAGE_SHIFT (12) macro
34 #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
35 #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
881 #define MAX_AGAW_PFN_WIDTH (MAX_AGAW_WIDTH - VTD_PAGE_SHIFT)
932 return mm_pfn << (PAGE_SHIFT - VTD_PAGE_SHIFT);
936 return ((mm_pfn + 1) << (PAGE_SHIFT - VTD_PAGE_SHIFT)) - 1;
1054 return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT;
1060 return npages << VTD_PAGE_SHIFT;
H A Diommu.c49 #define __DOMAIN_MAX_PFN(gaw) ((((uint64_t)1) << ((gaw) - VTD_PAGE_SHIFT)) - 1)
56 #define DOMAIN_MAX_ADDR(gaw) (((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT)
303 int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
818 pgtable_walk(iommu, addr >> VTD_PAGE_SHIFT, bus, devfn, pgtable, level);
855 pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE;
1335 !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {
1839 cache_tag_flush_range(domain, start_pfn << VTD_PAGE_SHIFT,
1840 end_pfn << VTD_PAGE_SHIFT, 0);
1882 pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
3827 return __domain_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT,
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H A Ddebugfs.c307 return BIT_ULL(VTD_PAGE_SHIFT + VTD_STRIDE_SHIFT * (level - 1));
314 iova >> VTD_PAGE_SHIFT, path[5], path[4], path[3]);
H A Dsvm.c389 event.fault.prm.addr = (u64)desc->addr << VTD_PAGE_SHIFT;
446 address = (u64)req->addr << VTD_PAGE_SHIFT;
H A Dpasid.c231 qi_flush_dev_iotlb(iommu, sid, pfsid, qdep, 0, 64 - VTD_PAGE_SHIFT);
233 qi_flush_dev_iotlb_pasid(iommu, sid, pfsid, pasid, qdep, 0, 64 - VTD_PAGE_SHIFT);
H A Ddmar.c1559 addr |= (1ULL << (VTD_PAGE_SHIFT + mask - 1)) - 1;
1599 unsigned long align = (1ULL << (VTD_PAGE_SHIFT + mask));
1620 unsigned long mask = 1UL << (VTD_PAGE_SHIFT + size_order - 1);
1658 desc.qw1 |= GENMASK_ULL(size_order + VTD_PAGE_SHIFT - 1,
1659 VTD_PAGE_SHIFT);

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