Searched refs:VIACR (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/video/fbdev/via/
H A Dviamode.c19 {VIACR, CR32, 0xFF, 0x00},
20 {VIACR, CR33, 0xFF, 0x00},
21 {VIACR, CR35, 0xFF, 0x00},
22 {VIACR, CR36, 0x08, 0x00},
23 {VIACR, CR69, 0xFF, 0x00},
24 {VIACR, CR6A, 0xFF, 0x40},
25 {VIACR, CR6B, 0xFF, 0x00},
26 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
27 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
28 {VIACR, CR8
[all...]
H A Dvia_modesetting.c36 via_write_reg_mask(VIACR, 0x11, 0x00, 0x80);
38 via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF);
39 via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF);
40 via_write_reg(VIACR, 0x02, raw.hor_blank_start & 0xFF);
41 via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F);
42 via_write_reg(VIACR, 0x04, raw.hor_sync_start & 0xFF);
43 via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F)
45 via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF);
46 via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01)
53 via_write_reg_mask(VIACR,
[all...]
H A Ddvi.c193 RegCR6B = viafb_read_reg(VIACR, CR6B);
194 viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08);
198 RegCR91 = viafb_read_reg(VIACR, CR91);
199 viafb_write_reg(CR91, VIACR, 0x1D);
205 RegCR93 = viafb_read_reg(VIACR, CR93);
206 viafb_write_reg(CR93, VIACR, 0x01);
219 RegCR91 = viafb_read_reg(VIACR, CR91);
220 viafb_write_reg(CR91, VIACR, 0x1D);
224 RegCR9B = viafb_read_reg(VIACR, CR9B);
225 viafb_write_reg(CR9B, VIACR,
[all...]
H A Dlcd.c175 viafb_read_reg(VIACR, CR3F) & 0x0F;
345 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);
360 viafb_load_reg_num, reg, VIACR);
376 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
381 viafb_load_reg_num, reg, VIACR);
388 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
404 viafb_load_reg_num, reg, VIACR);
420 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);
425 viafb_load_reg_num, reg, VIACR);
432 viafb_write_reg_mask(CRA2, VIACR,
[all...]
H A Dhw.c90 {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
91 {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
92 {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
93 {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
94 {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
95 {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
96 {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
97 {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
98 {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
99 {VIACR, CR8
[all...]
H A Dvia_utility.c148 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);
170 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1);
203 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);
H A Dvia_clock.c249 via_write_reg_mask(VIACR, 0x6C, data, 0xF0);
255 via_write_reg_mask(VIACR, 0x6C, data, 0x0F);
H A Dviafbdev.c1119 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f;
1151 viafb_write_reg_mask(CR96, VIACR,
1187 dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f;
1219 viafb_write_reg_mask(CR9B, VIACR,
1251 dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f;
1270 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
1285 dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f;
1304 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f);
/linux-master/include/linux/
H A Dvia-core.h183 #define VIACR 0x3D4 macro

Completed in 211 milliseconds