Searched refs:VAL (Results 1 - 25 of 56) sorted by relevance

123

/linux-master/include/uapi/linux/
H A Dbtf.h92 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24)
93 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16)
94 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff)
/linux-master/tools/include/uapi/linux/
H A Dbtf.h92 #define BTF_INT_ENCODING(VAL) (((VAL) & 0x0f000000) >> 24)
93 #define BTF_INT_OFFSET(VAL) (((VAL) & 0x00ff0000) >> 16)
94 #define BTF_INT_BITS(VAL) ((VAL) & 0x000000ff)
/linux-master/arch/arm64/include/asm/
H A Dbarrier.h192 __unqual_scalar_typeof(*ptr) VAL; \
194 VAL = READ_ONCE(*__PTR); \
197 __cmpwait_relaxed(__PTR, VAL); \
199 (typeof(*ptr))VAL; \
205 __unqual_scalar_typeof(*ptr) VAL; \
207 VAL = smp_load_acquire(__PTR); \
210 __cmpwait_relaxed(__PTR, VAL); \
212 (typeof(*ptr))VAL; \
H A Dhw_breakpoint.h98 #define AARCH64_DBG_READ(N, REG, VAL) do {\
99 VAL = read_sysreg(dbg##REG##N##_el1);\
102 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\
103 write_sysreg(VAL, dbg##REG##N##_el1);\
/linux-master/arch/arm64/kernel/
H A Dhw_breakpoint.c60 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \
62 AARCH64_DBG_READ(N, REG, VAL); \
65 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \
67 AARCH64_DBG_WRITE(N, REG, VAL); \
70 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \
71 READ_WB_REG_CASE(OFF, 0, REG, VAL); \
72 READ_WB_REG_CASE(OFF, 1, REG, VAL); \
73 READ_WB_REG_CASE(OFF, 2, REG, VAL); \
74 READ_WB_REG_CASE(OFF, 3, REG, VAL); \
75 READ_WB_REG_CASE(OFF, 4, REG, VAL); \
[all...]
/linux-master/arch/loongarch/include/asm/
H A Dhw_breakpoint.h57 #define LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL) \
60 VAL = csr_read64(LOONGARCH_CSR_##IB##N##REG); \
62 VAL = csr_read64(LOONGARCH_CSR_##DB##N##REG); \
65 #define LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL) \
68 csr_write64(VAL, LOONGARCH_CSR_##IB##N##REG); \
70 csr_write64(VAL, LOONGARCH_CSR_##DB##N##REG); \
/linux-master/arch/loongarch/kernel/
H A Dhw_breakpoint.c36 #define READ_WB_REG_CASE(OFF, N, REG, T, VAL) \
38 LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL); \
41 #define WRITE_WB_REG_CASE(OFF, N, REG, T, VAL) \
43 LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL); \
46 #define GEN_READ_WB_REG_CASES(OFF, REG, T, VAL) \
47 READ_WB_REG_CASE(OFF, 0, REG, T, VAL); \
48 READ_WB_REG_CASE(OFF, 1, REG, T, VAL); \
49 READ_WB_REG_CASE(OFF, 2, REG, T, VAL); \
50 READ_WB_REG_CASE(OFF, 3, REG, T, VAL); \
51 READ_WB_REG_CASE(OFF, 4, REG, T, VAL); \
[all...]
/linux-master/kernel/locking/
H A Dqrwlock.c33 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED));
51 atomic_cond_read_acquire(&lock->cnts, !(VAL & _QW_LOCKED));
85 cnts = atomic_cond_read_relaxed(&lock->cnts, VAL == _QW_WAITING);
H A Dmcs_spinlock.h34 smp_cond_load_acquire(l, VAL); \
H A Dqspinlock.c339 (VAL != _Q_PENDING_VAL) || !cnt--);
383 smp_cond_load_acquire(&lock->locked, !VAL);
514 val = atomic_cond_read_acquire(&lock->val, !(VAL & _Q_LOCKED_PENDING_MASK));
554 next = smp_cond_load_relaxed(&node->next, (VAL));
/linux-master/arch/arm/kernel/
H A Dhw_breakpoint.c48 #define READ_WB_REG_CASE(OP2, M, VAL) \
50 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
53 #define WRITE_WB_REG_CASE(OP2, M, VAL) \
55 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
58 #define GEN_READ_WB_REG_CASES(OP2, VAL) \
59 READ_WB_REG_CASE(OP2, 0, VAL); \
60 READ_WB_REG_CASE(OP2, 1, VAL); \
61 READ_WB_REG_CASE(OP2, 2, VAL); \
62 READ_WB_REG_CASE(OP2, 3, VAL); \
63 READ_WB_REG_CASE(OP2, 4, VAL); \
[all...]
/linux-master/arch/arm/include/asm/
H A Dhw_breakpoint.h109 #define ARM_DBG_READ(N, M, OP2, VAL) do {\
110 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
113 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\
114 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/linux-master/tools/testing/selftests/cgroup/
H A Dtest_cpuset_prs.sh367 VAL=${1#*=}
369 if [[ $VAL -eq 0 ]]
378 echo $VAL > $CPUFILE
428 VAL=${CMD#?}
429 case $VAL in
430 0) VAL=member
432 1) VAL=root
434 2) VAL=isolated
437 echo "Invalid partition state - $VAL"
441 COMM="echo $VAL >
[all...]
/linux-master/drivers/watchdog/
H A Dit8712f_wdt.c57 #define VAL 0x2f /* The value to read/write */ macro
95 return inb(VAL);
101 outb(val, VAL);
108 val = inb(VAL) << 8;
110 val |= inb(VAL);
117 outb(ldn, VAL);
138 outb(0x02, VAL);
H A Dit87_wdt.c40 #define VAL 0x2f macro
125 outb(0x02, VAL);
132 outb(ldn, VAL);
138 return inb(VAL);
144 outb(val, VAL);
152 val = inb(VAL) << 8;
154 val |= inb(VAL);
/linux-master/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hdr.h641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4)))
642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4)))
643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4)))
644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4)))
645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL)
[all...]
/linux-master/tools/testing/selftests/bpf/
H A Dbpf_experimental.h231 #define __bpf_assert(LHS, op, cons, RHS, VAL) \
235 : : [lhs] "r"(LHS), [rhs] cons(RHS), [value] "ri"(VAL) : ); \
238 #define __bpf_assert_op_sign(LHS, op, cons, RHS, VAL, supp_sign) \
242 __bpf_assert(LHS, "s" #op, cons, RHS, VAL); \
244 __bpf_assert(LHS, #op, cons, RHS, VAL); \
247 #define __bpf_assert_op(LHS, op, RHS, VAL, supp_sign) \
251 __bpf_assert_op_sign(LHS, op, "r", rhs_var, VAL, supp_sign); \
253 __bpf_assert_op_sign(LHS, op, "i", RHS, VAL, supp_sign); \
/linux-master/drivers/gpio/
H A Dgpio-it87.c38 #define VAL 0x2f macro
95 outb(0x02, VAL);
102 outb(ldn, VAL);
108 return inb(VAL);
114 outb(val, VAL);
122 val = inb(VAL) << 8;
124 val |= inb(VAL);
/linux-master/include/asm-generic/
H A Dbarrier.h243 * pre-named variable @VAL to be used in @cond.
248 __unqual_scalar_typeof(*ptr) VAL; \
250 VAL = READ_ONCE(*__PTR); \
255 (typeof(*ptr))VAL; \
H A Dspinlock.h49 atomic_cond_read_acquire(lock, ticket == (u16)VAL);
/linux-master/tools/testing/selftests/ntb/
H A Dntb_test.sh266 VAL=$RANDOM
267 write_file "$VAL" "$LOC/spad$i"
270 if [[ "$VAL" -ne "$RVAL" ]]; then
271 echo "Scratchpad $i value $RVAL doesn't match $VAL" >&2
300 VAL=$RANDOM
301 write_file "$VAL" "$LOC/msg$i"
304 if [[ "$VAL" -ne "${RVAL%%<-*}" ]]; then
305 echo "Message $i value $RVAL doesn't match $VAL" >&2
/linux-master/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hdr.h950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf)
951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf)
952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf)
953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3)
954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 1
[all...]
/linux-master/drivers/scsi/
H A Dsun3x_esp.c45 #define dma_write32(VAL, REG) \
46 writel((VAL), esp->dma_regs + (REG))
50 #define dma_write32(VAL, REG) \
51 do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
/linux-master/drivers/staging/rtl8723bs/hal/
H A DHalPhyRf_8723B.c19 #define VAL 1 macro
971 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskDWord);
975 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord);
979 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskDWord);
984 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord);
986 /* pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */
987 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = 0x40000100;
998 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord);
1003 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord);
1047 /* pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC9C][VAL]
[all...]
/linux-master/tools/testing/selftests/sysctl/
H A Dsysctl.sh128 VAL=""
132 VAL="60"
135 VAL="1"
138 VAL="314"
141 VAL="(none)"
144 VAL=""
149 echo -n $VAL > $TARGET

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