Searched refs:UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/clk/tegra/
H A Dclk-pll.c210 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE BIT(5) macro
H A Dclk-tegra210.c203 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE BIT(5) macro

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