Searched refs:TempReg (Results 1 - 7 of 7) sorted by last modified time
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | GlobalISelEmitter.cpp | 3325 unsigned TempReg); 4180 // Assign the result to TempReg.
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegStackify.cpp | 123 Register TempReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass); local 125 MI->addOperand(MachineOperand::CreateReg(TempReg, false)); 127 TII->get(WebAssembly::CONST_I32), TempReg)
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 450 Register TempReg = RegInfo->createVirtualRegister(&PPC::GPRCRegClass); local 453 .addReg(TempReg, RegState::Define).addReg(GlobalBaseReg);
|
H A D | PPCFrameLowering.cpp | 837 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg local 868 &ScratchReg, &TempReg); 872 SingleScratchReg = ScratchReg == TempReg; 977 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); 981 .addReg(TempReg, getKillRegState(true)) 1002 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); 1035 .addReg(TempReg, getKillRegState(true)) 1077 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, TempReg) 1079 BuildMI(MBB, MBBI, dl, OrImmInst, TempReg) 1080 .addReg(TempReg, RegStat 1406 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 396 unsigned TempReg = materialize32BitInt(Imm, &Mips::GPR32RegClass); local 397 emitInst(Mips::MTC1, DestReg).addReg(TempReg); 427 unsigned TempReg = createResultReg(RC); local 428 emitInst(Mips::ADDiu, TempReg) 431 DestReg = TempReg; 653 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 654 emitInst(Mips::XOR, TempReg).addReg(LeftReg).addReg(RightReg); 655 emitInst(Mips::SLTiu, ResultReg).addReg(TempReg).addImm(1); 659 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 660 emitInst(Mips::XOR, TempReg) 671 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 677 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 689 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 695 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 1062 unsigned TempReg = createResultReg(RC); local 1128 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); local 1612 unsigned TempReg[3]; local 1627 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 1633 unsigned TempReg[8]; local 1845 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 1980 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 2106 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); local 2116 unsigned TempReg = local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 2971 Register TempReg = MF->getRegInfo().createVirtualRegister(&ARM::rGPRRegClass); local 2974 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), TempReg) 2987 .addReg(TempReg)
|
H A D | ARMExpandPseudoInsts.cpp | 936 Register TempReg = MI.getOperand(1).getReg(); local 991 MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), TempReg) 1000 .addReg(TempReg, RegState::Kill) 1055 Register TempReg = MI.getOperand(1).getReg(); local 1113 MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg); 1120 .addReg(TempReg, RegState::Kill)
|
Completed in 206 milliseconds