Searched refs:SREG (Results 1 - 2 of 2) sorted by path
| /u-boot/arch/riscv/cpu/ |
| H A D | mtrap.S | 18 #define SREG sw define
22 #define SREG sd define
33 SREG x1, 1 * REGBYTES(sp)
34 SREG x2, 2 * REGBYTES(sp)
35 SREG x3, 3 * REGBYTES(sp)
36 SREG x4, 4 * REGBYTES(sp)
37 SREG x5, 5 * REGBYTES(sp)
38 SREG x6, 6 * REGBYTES(sp)
39 SREG x7, 7 * REGBYTES(sp)
40 SREG x
[all...] |
| H A D | start.S | 21 #define SREG sw define
28 #define SREG sd define
120 SREG zero, 0(t1) /* t1 is always 16 byte aligned */
173 SREG s1, GD_FIRMWARE_FDT_ADDR(gp)
175 SREG tp, GD_BOOT_HART(gp)
201 SREG t2, GD_AVAILABLE_HARTS(gp)
232 SREG zero, 0(t0)
314 SREG t5, 0(t1)
336 SREG t5, 0(t3)
358 SREG t
[all...] |
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