Searched refs:SMEMC_VIRT (Results 1 - 5 of 5) sorted by relevance

/linux-master/arch/arm/mach-pxa/
H A Dsmemc.h13 #define SMEMC_VIRT IOMEM(0xf6000000) macro
15 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
16 #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
17 #define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */
18 #define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */
19 #define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */
20 #define MECR (SMEMC_VIRT + 0x14) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
21 #define SXLCR (SMEMC_VIRT + 0x18) /* LCR value to be written to SDRAM-Timing Synchronous Flash */
22 #define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */
23 #define SXMRS (SMEMC_VIRT
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H A Daddr-map.h32 #define SMEMC_VIRT IOMEM(0xf6000000) macro
H A Dpxa25x.c162 .virtual = (unsigned long)SMEMC_VIRT,
H A Dpxa3xx.c379 .virtual = (unsigned long)SMEMC_VIRT,
H A Dpxa27x.c249 .virtual = (unsigned long)SMEMC_VIRT,

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