Searched refs:SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT (Results 1 - 8 of 8) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h37037 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT macro
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H A Dgc_11_0_3_sh_mask.h5421 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x18 macro
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_2_2_sh_mask.h239 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x18 macro
H A Dsdma0_4_2_sh_mask.h239 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x18 macro
H A Dsdma0_4_1_sh_mask.h236 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x18 macro
H A Dsdma0_4_0_sh_mask.h239 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x18 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h1556 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x3 macro
H A Doss_3_0_sh_mask.h1884 #define SDMA0_PUB_REG_TYPE1__SDMA0_STATUS2_REG__SHIFT 0x3 macro

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