Searched refs:RVU_PF_VFFLR_INT_ENA_W1CX (Results 1 - 5 of 5) sorted by relevance
/linux-master/drivers/net/ethernet/marvell/octeontx2/nic/ |
H A D | otx2_reg.h | 29 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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H A D | otx2_pf.c | 88 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); 99 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); 167 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg),
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/linux-master/drivers/crypto/marvell/octeontx2/ |
H A D | otx2_cptpf_main.c | 109 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); 123 RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(num_vfs - 64)); 201 RVU_PF_VFFLR_INT_ENA_W1CX(reg),
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/linux-master/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | rvu_reg.h | 95 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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H A D | rvu.c | 2735 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf)); 3110 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); 3117 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
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