Searched refs:RREG32_MC (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/gpu/drm/radeon/
H A Drs400.c71 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL);
115 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
179 tmp = RREG32_MC(RS480_MC_MISC_CNTL);
183 tmp = RREG32_MC(RS480_MC_MISC_CNTL);
201 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
317 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
320 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE);
322 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2);
324 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION);
326 tmp = RREG32_MC(RS690_MCCFG_FB_LOCATIO
[all...]
H A Drs600.c531 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
535 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
539 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
542 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
614 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
616 tmp = RREG32_MC(R_000009_MC_CNTL1);
632 tmp = RREG32_MC(R_000009_MC_CNTL1);
864 if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS)))
891 base = RREG32_MC(R_000004_MC_FB_LOCATION);
H A Dr520.c43 tmp = RREG32_MC(R520_MC_STATUS);
99 tmp = RREG32_MC(R520_MC_CNTL0);
H A Drs690.c44 tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS);
164 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
180 h_addr = G_00005F_K8_ADDR_EXT(RREG32_MC(R_00005F_MC_MISC_UMA_CNTL));
181 l_addr = RREG32_MC(R_00001E_K8_FB_LOCATION);
610 tmp = RREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER);
H A Drv515.c125 tmp = RREG32_MC(MC_STATUS);
169 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK;
1265 tmp = RREG32_MC(MC_MISC_LAT_TIMER);
H A Dr600.c1482 h_addr = G_000012_K8_ADDR_EXT(RREG32_MC(R_000012_MC_MISC_UMA_CNTL));
1483 l_addr = RREG32_MC(R_000011_K8_FB_LOCATION);
H A Dradeon.h2512 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) macro

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