Searched refs:RHSReg (Results 1 - 4 of 4) sorted by last modified time

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp2125 unsigned RHSReg = getRegForValue(RHS); local
2131 if (!LHSReg || !RHSReg)
2136 unsigned ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, RHSIsKill,
2188 unsigned RHSReg = getRegForValue(RHS); local
2197 if (!LHSReg || !RHSReg || !CmpLHS || !CmpRHS)
2219 // Place RHSReg is the passthru of the masked movss/sd operation and put
2223 unsigned MovReg = fastEmitInst_rrrr(MovOpcode, VR128X, RHSReg, RHSIsKill,
2246 unsigned VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, RHSIsKill,
2271 RHSReg, RHSIsKill);
2346 unsigned RHSReg local
2932 unsigned RHSReg; local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp321 unsigned RHSReg; local
323 RHSReg = materializeInt(C, MVT::i32);
325 RHSReg = getRegForValue(RHS);
326 if (!RHSReg)
333 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp51 // if \p LHSReg and \p RHSReg are in the relationship defined by \p Cond, or
54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
504 unsigned LHSReg, unsigned RHSReg,
507 return MRI.getType(LHSReg) == MRI.getType(RHSReg) &&
509 validReg(MRI, RHSReg, ExpectedSize, ExpectedRegBankID);
546 auto RHSReg = MIB->getOperand(3).getReg(); local
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize,
557 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg,
564 RHSReg, ZeroReg))
566 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg,
503 validOpRegPair(MachineRegisterInfo &MRI, unsigned LHSReg, unsigned RHSReg, unsigned ExpectedSize, unsigned ExpectedRegBankID) const argument
575 insertComparison(CmpConstants Helper, InsertInfo I, unsigned ResReg, ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg, unsigned PrevRes) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp205 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
211 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
216 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
243 unsigned RHSReg, bool RHSIsKill, bool WantResult = true);
245 unsigned RHSReg, bool RHSIsKill,
253 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
1235 unsigned RHSReg = getRegForValue(SI->getOperand(0)); local
1236 if (!RHSReg)
1239 return emitAddSub_rx(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg,
1243 unsigned RHSReg local
1263 unsigned RHSReg = getRegForValue(MulLHS); local
1288 unsigned RHSReg = getRegForValue(SI->getOperand(0)); local
1302 unsigned RHSReg = getRegForValue(RHS); local
1314 emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, bool SetFlags, bool WantResult) argument
1397 emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, AArch64_AM::ShiftExtendType ShiftType, uint64_t ShiftImm, bool SetFlags, bool WantResult) argument
1440 emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, AArch64_AM::ShiftExtendType ExtType, uint64_t ShiftImm, bool SetFlags, bool WantResult) argument
1542 unsigned RHSReg = getRegForValue(RHS); local
1590 emitSubs_rr(MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, bool WantResult) argument
1597 emitSubs_rs(MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, AArch64_AM::ShiftExtendType ShiftType, uint64_t ShiftImm, bool WantResult) argument
1650 unsigned RHSReg = getRegForValue(MulLHS); local
1666 unsigned RHSReg = getRegForValue(SI->getOperand(0)); local
1677 unsigned RHSReg = getRegForValue(RHS); local
1737 emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, unsigned LHSReg, bool LHSIsKill, unsigned RHSReg, bool RHSIsKill, uint64_t ShiftImm) argument
3757 unsigned RHSReg = getRegForValue(RHS); local
3792 unsigned RHSReg = getRegForValue(RHS); local
[all...]

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