Searched refs:REG_READ (Results 1 - 11 of 11) sorted by relevance
/freebsd-11-stable/sys/mips/adm5120/ |
H A D | obio.c | 99 #define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(ADM5120_BASE_ICU + (o))) macro 100 #define REG_WRITE(o,v) (REG_READ(o)) = (v) 135 reg = REG_READ(ICU_DISABLE_REG); 150 reg = REG_READ(ICU_DISABLE_REG); 372 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask); 374 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask); 403 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask); 405 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask); 408 irqmask = REG_READ(ICU_ENABLE_REG); 428 irqstat = REG_READ(ICU_FIQ_STATUS_RE [all...] |
H A D | if_admsw.c | 221 #define REG_READ(o) bus_read_4((sc)->mem_res, (o)) macro 309 REG_READ(PORT_CONF0_REG) | PORT_CONF0_DP_MASK); 311 REG_READ(CPUP_CONF_REG) | CPUP_CONF_DCPUP); 322 REG_READ(PHY_CNTL2_REG) & ~PHY_CNTL2_PHYR_MASK); 339 REG_READ(PHY_CNTL2_REG) | PHY_CNTL2_ANE_MASK | PHY_CNTL2_PHYR_MASK | 342 REG_WRITE(PHY_CNTL3_REG, REG_READ(PHY_CNTL3_REG) | PHY_CNTL3_RNT); 357 REG_READ(FC_TH_REG) & ~(FC_TH_FCS_MASK | FC_TH_D2S_MASK)); 371 while (!(REG_READ(MAC_WT0_REG) & MAC_WT0_WRITE_DONE)); 374 wdog1 = REG_READ(ADM5120_WDOG1); 864 pending = REG_READ(ADMSW_INT_S [all...] |
/freebsd-11-stable/sys/mips/idt/ |
H A D | idtpci.c | 110 #define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_PCI + (o))) macro 111 #define REG_WRITE(o,v) (REG_READ(o)) = (v) 162 pci_data = REG_READ(IDT_PCI_STATUS); 193 pci_data = REG_READ(IDT_PCI_LBA0_CNTL); 199 pci_data = REG_READ(IDT_PCI_LBA1_CNTL); 206 pci_data = REG_READ(IDT_PCI_LBA2_CNTL); 213 pci_data = REG_READ(IDT_PCI_LBA3_CNTL); 216 pci_data = REG_READ(IDT_PCI_CNTL) & ~IDT_PCI_CNTL_TNR; 218 pci_data = REG_READ(IDT_PCI_CNTL); 302 data = REG_READ(IDT_PCI_CFG_DAT [all...] |
/freebsd-11-stable/sys/mips/alchemy/ |
H A D | obio.c | 99 #define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(ADM5120_BASE_ICU + (o))) macro 100 #define REG_WRITE(o,v) (REG_READ(o)) = (v) 374 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) | irqmask); 376 REG_WRITE(ICU_MODE_REG, REG_READ(ICU_MODE_REG) & ~irqmask); 420 irqstat = REG_READ(ICU_FIQ_STATUS_REG); 421 irqstat |= REG_READ(ICU_STATUS_REG);
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar5312/ |
H A D | ar5312reg.h | 32 #define REG_READ(_reg) *((volatile uint32_t *)(_reg)) macro
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/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300_reset.c | 1714 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) macro 1718 REG_READ(AR_SOC_RST_RESET) | AR_SOC_WLAN_RST); 1720 REG_READ(AR_SOC_RST_RESET) & (~AR_SOC_WLAN_RST)); 1725 tmp_reg = REG_READ(AR_SOC_BOOT_STRAP); 1737 #undef REG_READ macro 1771 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) macro 1817 REG_WRITE(RST_RESET, (REG_READ(RST_RESET) | RTC_RESET)); 1819 REG_WRITE(RST_RESET, (REG_READ(RST_RESET) & ~RTC_RESET)); 1827 #undef REG_READ macro 1952 #define REG_READ(_re macro 1977 #undef REG_READ macro 3084 #define REG_READ macro 3099 #undef REG_READ macro 5234 #define REG_READ macro 5267 #undef REG_READ macro 5341 #define REG_READ macro 5349 #undef REG_READ macro [all...] |
H A D | ar9300_attach.c | 595 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) macro 596 if ((REG_READ(AR_SOC_RST_REVISION_ID) & AR_SREV_REVISION_HORNET_11_MASK) 603 #undef REG_READ macro 610 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) macro 613 REG_READ(AR_SOC_RST_REVISION_ID) & AR_SREV_REVISION_WASP_MASK; 614 #undef REG_READ macro 775 #define REG_READ(_reg) (*((volatile u_int32_t *)(_reg))) macro 776 if (REG_READ(AR_SOC_SEL_25M_40M) & 0x1) { 785 #undef REG_READ macro 796 #define REG_READ(_re macro 804 #undef REG_READ macro 2323 #define REG_READ macro 2330 #undef REG_READ macro [all...] |
H A D | ar9300_misc.c | 2728 #define REG_READ(_reg) *((volatile u_int32_t *)(_reg)) macro 2729 wasp_mm_rev = (REG_READ(AR_SOC_RST_REVISION_ID) & 2733 #undef REG_READ macro
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/freebsd-11-stable/sys/arm/broadcom/bcm2835/ |
H A D | bcm2835_mbox.c | 50 #define REG_READ 0x00 macro 108 msg = mbox_read_4(sc, REG_READ); 196 (void)mbox_read_4(sc, REG_READ);
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/freebsd-11-stable/sys/dev/qlnx/qlnxe/ |
H A D | nvm_map.h | 243 #define E5_BACKUP_KEY_CHAIN_ADDR ((0x20000 << (REG_READ(0, MCP_REG_NVM_CFG4) & 0x7)) - 0x1000)
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/freebsd-11-stable/sys/mips/rt305x/ |
H A D | obio.c | 94 #define REG_READ(o) *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(INTCTL_BASE + (o))) macro 95 #define REG_WRITE(o,v) (REG_READ(o)) = (v)
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