Searched refs:PCIEIP_REG_REG_PWR_BDGT_DATA_0_PWR_BDGT_DATA_0_BB (Results 1 - 1 of 1) sorted by last modified time

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4990 #define PCIEIP_REG_REG_PWR_BDGT_DATA_0_PWR_BDGT_DATA_0_BB (0x1fffff<<0) // This is the value read from the pwr_bdgt_data register (0x158) when the pwr_bdgt_data_sel register (0x154) value is 0. This value is sticky and only reset by HARD Reset. macro
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