Searched refs:PCIEIP_REG_PML1_SUB_CONTROL1_LTR_L1_2_THRESHOLD_VALUE_BB (Results 1 - 1 of 1) sorted by path
| /freebsd-11-stable/sys/dev/qlnx/qlnxe/ | ||
| H A D | reg_addr.h | 3302 #define PCIEIP_REG_PML1_SUB_CONTROL1_LTR_L1_2_THRESHOLD_VALUE_BB (0x3ff<<16) // Provides a value for the L1_2 LTR threshold macro [all...] |
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