Searched refs:PCIEIP_REG_LINK_STATUS_CONTROL_2_CFG_EQ_COMPLETE_BB (Results 1 - 1 of 1) sorted by path

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h1427 #define PCIEIP_REG_LINK_STATUS_CONTROL_2_CFG_EQ_COMPLETE_BB (0x1<<17) // Equalization Complete - when set, this indicates that the Transmitter equalization procedure has completed. Path= i_cfg_func.i_cfg_public.i_cfg_exp_cap macro
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