Searched refs:OWL_DIVIDER_HW (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/clk/actions/
H A Dowl-s500.c209 OWL_DIVIDER_HW(CMU_BUSCLK1, 16, 2, 0, NULL),
215 OWL_DIVIDER_HW(CMU_BUSCLK1, 12, 2, 0, NULL),
237 OWL_DIVIDER_HW(CMU_BISPCLK, 0, 4, 0, std12rate_div_table),
243 OWL_DIVIDER_HW(CMU_SENSORCLK, 0, 4, 0, std12rate_div_table),
249 OWL_DIVIDER_HW(CMU_SENSORCLK, 8, 4, 0, std12rate_div_table),
273 OWL_DIVIDER_HW(CMU_PWM0CLK, 0, 10, 0, NULL),
279 OWL_DIVIDER_HW(CMU_PWM1CLK, 0, 10, 0, NULL),
285 OWL_DIVIDER_HW(CMU_PWM2CLK, 0, 10, 0, NULL),
291 OWL_DIVIDER_HW(CMU_PWM3CLK, 0, 10, 0, NULL),
297 OWL_DIVIDER_HW(CMU_PWM4CL
[all...]
H A Dowl-s700.c225 OWL_DIVIDER_HW(CMU_CSICLK, 0, 4, 0, NULL),
231 OWL_DIVIDER_HW(CMU_SICLK, 0, 4, 0, NULL),
261 OWL_DIVIDER_HW(CMU_NANDCCLK, 0, 3, 0, NULL),
285 OWL_DIVIDER_HW(CMU_UART0CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
291 OWL_DIVIDER_HW(CMU_UART1CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
297 OWL_DIVIDER_HW(CMU_UART2CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
303 OWL_DIVIDER_HW(CMU_UART3CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
309 OWL_DIVIDER_HW(CMU_UART4CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
315 OWL_DIVIDER_HW(CMU_UART5CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
321 OWL_DIVIDER_HW(CMU_UART6CL
[all...]
H A Dowl-divider.h29 #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ macro
41 .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \
H A Dowl-s900.c249 OWL_DIVIDER_HW(CMU_CSICLK, 0, 4, 0, NULL),
255 OWL_DIVIDER_HW(CMU_CSICLK, 16, 4, 0, NULL),
277 OWL_DIVIDER_HW(CMU_ASSISTPLL, 10, 1, 0, eth_mac_div_table),
307 OWL_DIVIDER_HW(CMU_AUDIOPLL, 24, 4, 0, hdmia_div_table),
337 OWL_DIVIDER_HW(CMU_AUDIOPLL, 20, 4, 0, i2s_div_table),
343 OWL_DIVIDER_HW(CMU_AUDIOPLL, 16, 4, 0, i2s_div_table),
355 OWL_DIVIDER_HW(CMU_LCDCLK, 0, 5, 0, NULL),
361 OWL_DIVIDER_HW(CMU_NANDCCLK, 0, 4, 0, nand_div_table),
367 OWL_DIVIDER_HW(CMU_NANDCCLK, 16, 4, 0, nand_div_table),
372 OWL_DIVIDER_HW(CMU_PWM0CL
[all...]

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