Searched refs:MASK_05 (Results 1 - 5 of 5) sorted by last modified time

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/common/
H A Dsaa7146_hlp.c476 saa7146_write(dev, MC2, (MASK_05 | MASK_21));
518 saa7146_write(dev, MC2, (MASK_05 | MASK_21 | MASK_03 | MASK_19));
519 saa7146_write(dev, MC1, (MASK_05 | MASK_21));
554 saa7146_write(dev, MC2, (MASK_05 | MASK_06 | MASK_21 | MASK_22) );
614 saa7146_write(dev, MC2, (MASK_05 | MASK_21));
631 saa7146_write(dev, MC2, (MASK_05 | MASK_21));
936 WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
937 WRITE_RPS0(MASK_05 | MASK_21); /* => values */
964 WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/dvb/ttpci/
H A Dav7110.c2345 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
H A Dbudget-patch.c417 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/video/
H A Dsaa7146reg.h139 #define MASK_05 0x00000020 macro
167 #define SAA7146_MC1_TR_E_2 MASK_05
183 #define SAA7146_MC2_UPLD_HPS_V MASK_05
216 #define SAA7146_PSR_PIN2 MASK_05
248 #define SAA7146_SSR_VGT MASK_05
257 #define SAA7146_I2C_APERR MASK_05
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/media/
H A Dsaa7146.h228 #define MASK_05 0x00000020 /* Mask value for bit 5 */ macro

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