Searched refs:M4U_LARB2_ID (Results 1 - 14 of 14) sorted by path

/linux-master/include/dt-bindings/memory/
H A Dmediatek,mt8365-larb-port.h13 #define M4U_LARB2_ID 2 macro
52 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
53 #define M4U_PORT_CAM_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
54 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
55 #define M4U_PORT_CAM_LCS MTK_M4U_ID(M4U_LARB2_ID, 3)
56 #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
57 #define M4U_PORT_CAM_CAM_SV0 MTK_M4U_ID(M4U_LARB2_ID, 5)
58 #define M4U_PORT_CAM_CAM_SV1 MTK_M4U_ID(M4U_LARB2_ID, 6)
59 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB2_ID, 7)
60 #define M4U_PORT_CAM_LSCI_D MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt2712-larb-port.h13 #define M4U_LARB2_ID 2 macro
46 #define M4U_PORT_CAM_DMA0 MTK_M4U_ID(M4U_LARB2_ID, 0)
47 #define M4U_PORT_CAM_DMA1 MTK_M4U_ID(M4U_LARB2_ID, 1)
48 #define M4U_PORT_CAM_DMA2 MTK_M4U_ID(M4U_LARB2_ID, 2)
H A Dmt6779-larb-port.h14 #define M4U_LARB2_ID 2 macro
53 #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
54 #define M4U_PORT_HW_VDEC_UFO_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
55 #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
56 #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
57 #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
58 #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
59 #define M4U_PORT_HW_VDEC_TILE_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)
60 #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 7)
61 #define M4U_PORT_HW_VDEC_VLD2_EXT MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt6795-larb-port.h14 #define M4U_LARB2_ID 2 macro
46 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
47 #define M4U_PORT_CAM_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
48 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
49 #define M4U_PORT_CAM_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
50 #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
51 #define M4U_PORT_CAM_IMGO_S MTK_M4U_ID(M4U_LARB2_ID, 5)
52 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
53 #define M4U_PORT_CAM_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
54 #define M4U_PORT_CAM_BPCI MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt8167-larb-port.h15 #define M4U_LARB2_ID 2 macro
43 #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
44 #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
45 #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
46 #define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
47 #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
48 #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
49 #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)
H A Dmt8173-larb-port.h13 #define M4U_LARB2_ID 2 macro
41 #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
42 #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
43 #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
44 #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
45 #define M4U_PORT_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
46 #define M4U_PORT_IMGO_D MTK_M4U_ID(M4U_LARB2_ID, 5)
47 #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
48 #define M4U_PORT_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
49 #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt8183-larb-port.h13 #define M4U_LARB2_ID 2 macro
42 #define M4U_PORT_IMG_IPUO MTK_M4U_ID(M4U_LARB2_ID, 0)
43 #define M4U_PORT_IMG_IPU3O MTK_M4U_ID(M4U_LARB2_ID, 1)
44 #define M4U_PORT_IMG_IPUI MTK_M4U_ID(M4U_LARB2_ID, 2)
/linux-master/scripts/dtc/include-prefixes/dt-bindings/memory/
H A Dmediatek,mt8365-larb-port.h13 #define M4U_LARB2_ID 2 macro
52 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
53 #define M4U_PORT_CAM_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
54 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
55 #define M4U_PORT_CAM_LCS MTK_M4U_ID(M4U_LARB2_ID, 3)
56 #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
57 #define M4U_PORT_CAM_CAM_SV0 MTK_M4U_ID(M4U_LARB2_ID, 5)
58 #define M4U_PORT_CAM_CAM_SV1 MTK_M4U_ID(M4U_LARB2_ID, 6)
59 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB2_ID, 7)
60 #define M4U_PORT_CAM_LSCI_D MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt2712-larb-port.h13 #define M4U_LARB2_ID 2 macro
46 #define M4U_PORT_CAM_DMA0 MTK_M4U_ID(M4U_LARB2_ID, 0)
47 #define M4U_PORT_CAM_DMA1 MTK_M4U_ID(M4U_LARB2_ID, 1)
48 #define M4U_PORT_CAM_DMA2 MTK_M4U_ID(M4U_LARB2_ID, 2)
H A Dmt6779-larb-port.h14 #define M4U_LARB2_ID 2 macro
53 #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
54 #define M4U_PORT_HW_VDEC_UFO_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
55 #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
56 #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
57 #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
58 #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
59 #define M4U_PORT_HW_VDEC_TILE_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)
60 #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 7)
61 #define M4U_PORT_HW_VDEC_VLD2_EXT MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt6795-larb-port.h14 #define M4U_LARB2_ID 2 macro
46 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
47 #define M4U_PORT_CAM_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
48 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
49 #define M4U_PORT_CAM_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
50 #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
51 #define M4U_PORT_CAM_IMGO_S MTK_M4U_ID(M4U_LARB2_ID, 5)
52 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
53 #define M4U_PORT_CAM_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
54 #define M4U_PORT_CAM_BPCI MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt8167-larb-port.h15 #define M4U_LARB2_ID 2 macro
43 #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
44 #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
45 #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
46 #define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
47 #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
48 #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
49 #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)
H A Dmt8173-larb-port.h13 #define M4U_LARB2_ID 2 macro
41 #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
42 #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
43 #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
44 #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
45 #define M4U_PORT_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
46 #define M4U_PORT_IMGO_D MTK_M4U_ID(M4U_LARB2_ID, 5)
47 #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
48 #define M4U_PORT_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
49 #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID,
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H A Dmt8183-larb-port.h13 #define M4U_LARB2_ID 2 macro
42 #define M4U_PORT_IMG_IPUO MTK_M4U_ID(M4U_LARB2_ID, 0)
43 #define M4U_PORT_IMG_IPU3O MTK_M4U_ID(M4U_LARB2_ID, 1)
44 #define M4U_PORT_IMG_IPUI MTK_M4U_ID(M4U_LARB2_ID, 2)

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