Searched refs:KN4K_MB_CSR (Results 1 - 3 of 3) sorted by relevance

/linux-master/arch/mips/include/asm/dec/
H A Dkn05.h37 #define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */ macro
/linux-master/arch/mips/dec/
H A Dkn02xa-berr.c126 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
H A Decc-berr.c246 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);

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