Searched refs:HHI_HDMI_CLK_CNTL (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/clk/meson/
H A Dmeson8b.h45 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
H A Dgxbb.h57 #define HHI_HDMI_CLK_CNTL 0x1CC /* 0x73 offset in data sheet */ macro
H A Dg12a.h75 #define HHI_HDMI_CLK_CNTL 0x1CC macro
H A Dgxbb.c2319 .offset = HHI_HDMI_CLK_CNTL,
2414 .offset = HHI_HDMI_CLK_CNTL,
2430 .offset = HHI_HDMI_CLK_CNTL,
2445 .offset = HHI_HDMI_CLK_CNTL,
H A Dmeson8b.c1708 .offset = HHI_HDMI_CLK_CNTL,
1809 .offset = HHI_HDMI_CLK_CNTL,
1830 .offset = HHI_HDMI_CLK_CNTL,
1847 .offset = HHI_HDMI_CLK_CNTL,
H A Dg12a.c3601 .offset = HHI_HDMI_CLK_CNTL,
3828 .offset = HHI_HDMI_CLK_CNTL,
3844 .offset = HHI_HDMI_CLK_CNTL,
3859 .offset = HHI_HDMI_CLK_CNTL,
/linux-master/drivers/gpu/drm/meson/
H A Dmeson_vclk.c89 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
817 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
819 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
821 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
898 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
907 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
916 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
925 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
934 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL,
H A Dmeson_dw_hdmi.c106 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ macro
617 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);

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