Searched refs:FIFO_CTRL0 (Results 1 - 4 of 4) sorted by relevance

/linux-master/sound/soc/meson/
H A Daxg-frddr.c81 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_FRDDR_PP_MODE, 0);
125 static SOC_ENUM_SINGLE_DECL(axg_frddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
198 static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel1_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
200 static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel2_enum, FIFO_CTRL0, CTRL0_SEL2_SHIFT,
202 static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel3_enum, FIFO_CTRL0, CTRL0_SEL3_SHIFT,
213 SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0,
216 SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0,
219 SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0,
H A Daxg-toddr.c76 regmap_update_bits(fifo->map, FIFO_CTRL0,
99 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0);
102 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED,
106 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0);
144 static SOC_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
209 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SYNC_CH,
H A Daxg-fifo.h41 #define FIFO_CTRL0 0x00 macro
H A Daxg-fifo.c70 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN,
148 regmap_update_bits(fifo->map, FIFO_CTRL0,
181 regmap_update_bits(fifo->map, FIFO_CTRL0,
274 regmap_update_bits(fifo->map, FIFO_CTRL0,

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