Searched refs:DPCSSYS_CR1_SUP_DIG_MPLLA_CP_GS_OVRD_IN__MPLLA_CP_INT_GS__SHIFT (Results 1 - 4 of 4) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_sh_mask.h17180 #define DPCSSYS_CR1_SUP_DIG_MPLLA_CP_GS_OVRD_IN__MPLLA_CP_INT_GS__SHIFT macro
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H A Ddpcs_4_2_0_sh_mask.h25048 #define DPCSSYS_CR1_SUP_DIG_MPLLA_CP_GS_OVRD_IN__MPLLA_CP_INT_GS__SHIFT macro
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H A Ddpcs_4_2_2_sh_mask.h25191 #define DPCSSYS_CR1_SUP_DIG_MPLLA_CP_GS_OVRD_IN__MPLLA_CP_INT_GS__SHIFT macro
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H A Ddpcs_4_2_3_sh_mask.h24193 #define DPCSSYS_CR1_SUP_DIG_MPLLA_CP_GS_OVRD_IN__MPLLA_CP_INT_GS__SHIFT macro
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