Searched refs:DPCSSYS_CR0_SUPX_ANA_MPLLA_MISC1__phase_sel_lock_MASK (Results 1 - 2 of 2) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h20894 #define DPCSSYS_CR0_SUPX_ANA_MPLLA_MISC1__phase_sel_lock_MASK macro
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H A Ddpcs_4_2_2_sh_mask.h21030 #define DPCSSYS_CR0_SUPX_ANA_MPLLA_MISC1__phase_sel_lock_MASK macro
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