Searched refs:DMA_CONTROL (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac_lib.c65 u32 value = readl(ioaddr + DMA_CONTROL);
67 writel(value, ioaddr + DMA_CONTROL);
72 u32 value = readl(ioaddr + DMA_CONTROL);
74 writel(value, ioaddr + DMA_CONTROL);
80 u32 value = readl(ioaddr + DMA_CONTROL);
82 writel(value, ioaddr + DMA_CONTROL);
87 u32 value = readl(ioaddr + DMA_CONTROL);
89 writel(value, ioaddr + DMA_CONTROL);
245 u32 csr6 = readl(ioaddr + DMA_CONTROL);
246 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
[all...]
H A Ddwmac100_dma.c57 u32 csr6 = readl(ioaddr + DMA_CONTROL);
66 writel(csr6, ioaddr + DMA_CONTROL);
H A Ddwmac1000_dma.c156 u32 csr6 = readl(ioaddr + DMA_CONTROL);
178 writel(csr6, ioaddr + DMA_CONTROL);
185 u32 csr6 = readl(ioaddr + DMA_CONTROL);
212 writel(csr6, ioaddr + DMA_CONTROL);
H A Ddwmac_dma.h21 #define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ macro
/linux-master/drivers/memstick/host/
H A Djmb38x_ms.c26 DMA_CONTROL = 0x08, enumerator in enum:__anon1116
431 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
483 writel(0, host->addr + DMA_CONTROL);
/linux-master/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/
H A Drpc_global_enums.h37 X(RM, DMA_CONTROL) //26
/linux-master/sound/pci/ice1712/
H A Dice1724.c556 old = inb(ICEMT1724(ice, DMA_CONTROL));
561 outb(old, ICEMT1724(ice, DMA_CONTROL));
637 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
783 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
836 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))

Completed in 283 milliseconds