Searched refs:DG1_MSTR_IRQ (Results 1 - 4 of 4) sorted by relevance

/linux-master/drivers/gpu/drm/xe/regs/
H A Dxe_regs.h57 #define DG1_MSTR_IRQ REG_BIT(31) macro
/linux-master/drivers/gpu/drm/xe/
H A Dxe_irq.c396 xe_mmio_write32(mmio, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ);
/linux-master/drivers/gpu/drm/i915/
H A Di915_irq.c615 raw_reg_write(regs, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ);
H A Di915_reg.h3328 #define DG1_MSTR_IRQ REG_BIT(31)
4428 #define DG1_MSTR_IRQ macro

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