Searched refs:CS_GPR (Results 1 - 4 of 4) sorted by relevance
/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | selftest_rps.c | 68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) macro 103 *cs++ = i915_mmio_reg_offset(CS_GPR(i)); 105 *cs++ = i915_mmio_reg_offset(CS_GPR(i)) + 4; 110 *cs++ = i915_mmio_reg_offset(CS_GPR(INC)); 125 *cs++ = i915_mmio_reg_offset(CS_GPR(COUNT)); 572 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)); 575 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc; 667 if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)),
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H A D | selftest_lrc.c | 26 #define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) macro 550 *cs++ = CS_GPR(ce->engine, n); 597 *cs++ = CS_GPR(ce->engine, n);
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H A D | selftest_execlists.c | 24 #define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) macro 3081 *cs++ = CS_GPR(engine, 0); 3102 *cs++ = CS_GPR(engine, 2 * i); 4245 *cs++ = CS_GPR(engine, n); 4250 *cs++ = CS_GPR(engine, (n + 1) % NUM_GPR_DW); 4304 * from one engine to the next. For this we check that the CS_GPR 4311 /* As we use CS_GPR we cannot run before they existed on all engines. */
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_perf.c | 1942 #define CS_GPR(x) GEN8_RING_CS_GPR(base, x) macro 2006 stream, cs, true /* save */, CS_GPR(i), 2021 *cs++ = i915_mmio_reg_offset(CS_GPR(START_TS)) + 4; 2025 *cs++ = i915_mmio_reg_offset(CS_GPR(START_TS)); 2035 * up the top 32bits of CS_GPR(1) as we're using it for other 2039 *cs++ = i915_mmio_reg_offset(CS_GPR(NOW_TS)) + 4; 2043 *cs++ = i915_mmio_reg_offset(CS_GPR(NOW_TS)); 2047 * CS_GPR(1). 2062 *cs++ = i915_mmio_reg_offset(CS_GPR(JUMP_PREDICATE)); 2087 *cs++ = i915_mmio_reg_offset(CS_GPR(DELTA_TARGE [all...] |
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