Searched refs:CSR_SA110_CNTL (Results 1 - 5 of 5) sorted by relevance

/linux-master/drivers/mtd/maps/
H A Ddc21285.c152 switch (*CSR_SA110_CNTL & (3<<14)) {
203 * CSR_SA110_CNTL. The value is the number of wait cycles, or
208 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16));
210 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20));
212 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24));
/linux-master/arch/arm/mach-footbridge/
H A Ddc21285.c188 cntl = *CSR_SA110_CNTL & 0xffffdf07;
189 *CSR_SA110_CNTL = cntl | SA110_CNTL_RXSERR;
204 *CSR_SA110_CNTL &= 0xffffde07;
323 *CSR_SA110_CNTL = (*CSR_SA110_CNTL & 0xffffde07) | SA110_CNTL_RXSERR;
H A Dcommon.c272 *CSR_SA110_CNTL &= ~(1 << 13);
278 *CSR_SA110_CNTL |= (1 << 13);
/linux-master/drivers/watchdog/
H A Dwdt285.c71 if (*CSR_SA110_CNTL & (1 << 13))
95 *CSR_SA110_CNTL |= 1 << 13;
/linux-master/arch/arm/include/asm/hardware/
H A Ddec21285.h63 #define CSR_SA110_CNTL DC21285_IO(0x013c) macro

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