Searched refs:CRTC_REG (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c48 #define CRTC_REG(reg) (reg + tg110->offsets.crtc) macro
99 addr = CRTC_REG(mmCRTC_STATUS);
111 uint32_t address = CRTC_REG(mmCRTC_CONTROL);
140 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value);
144 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value);
156 uint32_t addr = CRTC_REG(mmCRTC_BLACK_COLOR);
192 uint32_t addr = CRTC_REG(mmCRTC_3D_STRUCTURE_CONTROL);
262 CRTC_REG(mmCRTC_COUNT_CONTROL));
272 CRTC_REG(mmCRTC_COUNT_CONTROL), regval);
377 addr = CRTC_REG(mmCRTC_V_TOTAL_MI
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_timing_generator.c83 #define CRTC_REG(reg) (reg + tg110->offsets.crtc) macro
129 uint32_t addr = CRTC_REG(mmCRTC_START_LINE_CONTROL);
132 uint32_t addr2 = CRTC_REG(mmCRTC_CONTROL);
185 addr = CRTC_REG(mmCRTC_CONTROL);
/linux-master/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c83 #define CRTC_REG(reg) (reg + tg110->offsets.crtc) macro
129 uint32_t addr = CRTC_REG(mmCRTC_START_LINE_CONTROL);

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