Searched refs:CPHYSADDR (Results 1 - 25 of 26) sorted by relevance

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/linux-master/include/linux/
H A Dlantiq.h14 #ifndef CPHYSADDR
15 #define CPHYSADDR(a) 0 macro
/linux-master/arch/mips/include/asm/
H A Daddrspace.h58 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) macro
78 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
79 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
81 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
85 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
86 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
87 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
93 #define KSEG0ADDR(a) (CPHYSADDR(
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H A Dpage.h165 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x);
173 * CPHYSADDR.
175 return CPHYSADDR(x);
/linux-master/arch/mips/include/asm/mach-dec/
H A Dmc146818rtc.h20 #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
/linux-master/arch/mips/include/asm/mach-jazz/
H A Dfloppy.h67 vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a)));
111 vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */
118 vdma_free(vdma_phys2log(CPHYSADDR(addr)));
/linux-master/arch/mips/ralink/
H A Dprom.c50 if (CPHYSADDR(p) && *p) {
H A Dmt7621.c68 if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE)
/linux-master/arch/mips/dec/
H A Dtc.c45 tbus->slot_base = CPHYSADDR((long)rex_slot_address(0));
H A Dkn01-berr.c106 address = CPHYSADDR(vaddr);
/linux-master/arch/mips/lantiq/xway/
H A Dvmmc.c36 (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE,
/linux-master/arch/mips/lantiq/
H A Dprom.c60 if (CPHYSADDR(p) && *p) {
/linux-master/arch/mips/alchemy/devboards/
H A Dbcsr.c33 bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys));
34 bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys));
/linux-master/arch/mips/sibyte/common/
H A Dcfe.c89 initrd_pstart = CPHYSADDR(initrd_start);
90 initrd_pend = CPHYSADDR(initrd_end);
/linux-master/arch/mips/bcm47xx/
H A Dprom.c77 off = CPHYSADDR((unsigned long)prom_init);
/linux-master/drivers/gpio/
H A Dgpio-mm-lantiq.c96 ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1);
/linux-master/arch/mips/include/asm/mach-au1x00/
H A Dau1000_dma.h242 __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR);
307 __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR);
/linux-master/arch/mips/mm/
H A Dpage.c620 u64 to_phys = CPHYSADDR((unsigned long)page);
645 u64 from_phys = CPHYSADDR((unsigned long)from);
646 u64 to_phys = CPHYSADDR((unsigned long)to);
/linux-master/arch/mips/alchemy/common/
H A Dplatform.c37 alchemy_uart_enable(CPHYSADDR(port->membase));
42 alchemy_uart_disable(CPHYSADDR(port->membase));
H A Dclock.c109 #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x))))
/linux-master/arch/mips/pci/
H A Dpci-malta.c100 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE));
/linux-master/drivers/mtd/nand/raw/
H A Dxway_nand.c208 ltq_ebu_w32(CPHYSADDR(data->nandaddr)
/linux-master/arch/mips/jazz/
H A Djazzdma.c83 CPHYSADDR((unsigned long)pgtbl));
/linux-master/arch/mips/sgi-ip22/
H A Dip28-berr.c414 CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp);
/linux-master/drivers/net/ethernet/
H A Dlantiq_etop.c118 CPHYSADDR(ch->skb[ch->dma.desc]->data);
494 byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4);
/linux-master/drivers/tty/serial/
H A Dlantiq.c838 if (mmres->start == CPHYSADDR(LTQ_EARLY_ASC))

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