Searched refs:CM_GCR_REGn_MASK_CMTGT_IOCU0 (Results 1 - 3 of 3) sorted by relevance

/linux-master/arch/mips/ralink/
H A Dmt7621.c50 write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0);
187 CM_GCR_REGn_MASK_CMTGT_IOCU0);
/linux-master/arch/mips/pci/
H A Dpci-malta.c195 CM_GCR_REGn_MASK_CMTGT_IOCU0);
207 CM_GCR_REGn_MASK_CMTGT_IOCU0);
/linux-master/arch/mips/include/asm/
H A Dmips-cm.h232 #define CM_GCR_REGn_MASK_CMTGT_IOCU0 0x2 macro

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