Searched refs:CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN (Results 1 - 2 of 2) sorted by relevance

/linux-master/arch/mips/kernel/
H A Dmips-cm.c210 if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN)
234 write_gcr_l2_only_sync_base(addr | CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN);
/linux-master/arch/mips/include/asm/
H A Dmips-cm.h201 #define CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN BIT(0) macro

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