Searched refs:CHIP_MAILBOX_CLR_CPU (Results 1 - 2 of 2) sorted by relevance

/broadcom-cfe-1.4.2/cfe/verif/
H A Dvapi.S69 #define CHIP_MAILBOX_CLR_CPU A_BCM1480_IMR_REGISTER(0,R_BCM1480_IMR_MAILBOX_0_CLR_CPU) define
80 #define CHIP_MAILBOX_CLR_CPU A_IMR_REGISTER(0,R_IMR_MAILBOX_CLR_CPU) define
1096 la t1,PHYS_TO_K1(CHIP_MAILBOX_CLR_CPU)
/broadcom-cfe-1.4.2/cfe/arch/mips/common/src/
H A Dinit_mips.S75 #define CHIP_MAILBOX_CLR_CPU A_BCM1480_IMR_REGISTER(0,R_BCM1480_IMR_MAILBOX_0_CLR_CPU) define
82 #define CHIP_MAILBOX_CLR_CPU A_IMR_REGISTER(0,R_IMR_MAILBOX_CLR_CPU) define

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