Searched refs:CFG_TXCLK_MUXSEL0_SET (Results 1 - 2 of 2) sorted by relevance

/linux-master/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_hw.h157 #define CFG_TXCLK_MUXSEL0_SET(dst, val) xgene_set_bits(dst, val, 29, 3) macro
H A Dxgene_enet_hw.c490 CFG_TXCLK_MUXSEL0_SET(&rgmii, pdata->tx_delay);

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