Searched refs:CFG_CLE_FPSEL0_SET (Results 1 - 3 of 3) sorted by relevance

/linux-master/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_hw.h163 #define CFG_CLE_FPSEL0_SET(dst, val) xgene_set_bits(dst, val, 16, 4) macro
H A Dxgene_enet_xgmac.c428 CFG_CLE_FPSEL0_SET(&cb, fpsel);
H A Dxgene_enet_hw.c646 CFG_CLE_FPSEL0_SET(&cb, fpsel);

Completed in 239 milliseconds