Searched refs:CACHE_MODE_0_GEN7 (Results 1 - 6 of 6) sorted by path

/linux-master/drivers/gpu/drm/i915/gt/
H A Dgen7_renderclear.c400 batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
H A Dintel_gt_regs.h434 #define CACHE_MODE_0_GEN7 _MMIO(0x7000) /* IVB+ */ macro
H A Dintel_workarounds.c379 wa_masked_dis(wal, CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE);
2460 CACHE_MODE_0_GEN7,
2501 CACHE_MODE_0_GEN7,
2532 wa_masked_dis(wal, CACHE_MODE_0_GEN7, RC_OP_FLUSH_ENABLE);
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2243 MMIO_DFH(CACHE_MODE_0_GEN7, D_ALL, F_MODE_MASK | F_CMD_ACCESS,
H A Dmmio_context.c76 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
108 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
/linux-master/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c97 MMIO_D(CACHE_MODE_0_GEN7);

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