Searched refs:AR_ISR_S2 (Results 1 - 6 of 6) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_interrupts.c110 ah->ah_intrstate[3] = OS_REG_READ(ah, AR_ISR_S2);
122 uint32_t isr2 = OS_REG_READ(ah, AR_ISR_S2);
142 OS_REG_WRITE(ah, AR_ISR_S2, isr2);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_interrupts.c65 uint32_t isr2 = OS_REG_READ(ah, AR_ISR_S2);
H A Dar5212reg.h51 #define AR_ISR_S2 0x008c /* MAC Secondary interrupt status register 2 */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_interrupts.c151 ah->ah_intrstate[3] = OS_REG_READ(ah, AR_ISR_S2);
179 isr2 = OS_REG_READ(ah, AR_ISR_S2);
200 OS_REG_WRITE(ah, AR_ISR_S2, isr2);
H A Dar9300reg.h285 #define AR_ISR_S2 AR_MAC_DMA_OFFSET(MAC_DMA_ISR_S2) macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211reg.h54 #define AR_ISR_S2 0x008c /* Secondary interrupt status reg 2 */ macro

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