Searched refs:zq0cr1 (Results 1 - 12 of 12) sorted by relevance

/u-boot/board/ti/ks2_evm/
H A Dddr3_cfg.c33 .zq0cr1 = 0x0001005Dul,
H A Dddr3_k2e.c38 spd_cb.phy_cfg.zq0cr1 |= 0x10000;
H A Dddr3_k2g.c35 .zq0cr1 = 0x0001005Dul,
75 .zq0cr1 = 0x0001005Dul,
136 .zq0cr1 = 0x0001005Dul,
H A Dddr3_k2hk.c45 spd_cb.phy_cfg.zq0cr1 |= 0x10000;
/u-boot/arch/arm/mach-keystone/include/mach/
H A Dddr3.h33 unsigned int zq0cr1; member in struct:ddr3_phy_config
/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.h123 u32 zq0cr1; member in struct:stm32mp1_ddrphy_reg
H A Dstm32mp1_ddr_regs.h198 u32 zq0cr1; /* 0x184 zq 0 control 1 */ member in struct:stm32mp1_ddrphy
H A Dstm32mp1_ddr.c162 DDRPHY_REG_REG(zq0cr1),
/u-boot/arch/arm/mach-keystone/
H A Dddr3_spd.c40 debug_ddr_cfg("zq0cr1 0x%08X\n", ptr->zq0cr1);
362 spd_cb->phy_cfg.zq0cr1 = 0x0000005D;
H A Dddr3.c61 __raw_writel(phy_cfg->zq0cr1, base + KS2_DDRPHY_ZQ0CR1_OFFSET);
/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun6i.h214 u32 zq0cr1; /* 0x184 zq 0 control register 1 */ member in struct:sunxi_mctl_phy_reg
/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun6i.c158 writel(CONFIG_DRAM_ZQ, &mctl_phy->zq0cr1);

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