Searched refs:val0 (Results 1 - 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/
H A Dgpio.c12 u32 val0, val1; local
14 val0 = readl(BASE_DEVCPU_GCB + GPIO_ALT(0));
18 val0 |= mask;
21 val0 &= ~mask;
24 val0 |= mask;
27 val0 &= ~mask;
31 writel(val0, BASE_DEVCPU_GCB + GPIO_ALT(0));
/u-boot/board/mscc/jr2/
H A Djr2.c39 u32 val0, val1; local
52 val0 = readl(reg0);
55 writel(val0 | mask, reg0);
58 writel(val0 & ~mask, reg0);
61 writel(val0 | mask, reg0);
64 writel(val0 & ~mask, reg0);
/u-boot/drivers/net/octeontx2/
H A Drvu.h70 * @param val0 first 64 bits to write
73 static inline void st128(void *dest, u64 val0, u64 val1) argument
76 : [x0]"r"(val0), [x1]"r"(val1), [pm]"r"(dest)
84 * @param[out] val0 first 64 bits of data
87 static inline void ld128(const u64 *src, u64 *val0, u64 *val1) argument
90 : [x0]"r"(*val0), [x1]"r"(*val1), [pm]"r"(src));
/u-boot/drivers/misc/
H A Drockchip-io-domain.c51 u32 val0, val1; local
59 val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
63 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0);
75 val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
78 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0);
/u-boot/drivers/ram/octeon/
H A Ddimm_spd_eeprom.c200 int val0, val1; local
214 val0 = read_spd(dimm_config, dimm_index,
218 if (val0 < 0 && val1 < 0) {
224 if (val0 == 0xff && val1 == 0xff) {
240 val0 = read_spd(dimm_config, dimm_index,
244 if (val0 < 0 && val1 < 0) {
250 if (val0 == 0xff && val1 == 0xff) {
/u-boot/test/dm/
H A Dregmap.c141 u32 val0; member in struct:layout
152 regmap_set(map, struct layout, val0, 0xcacafafa);
155 ut_assertok(regmap_get(map, struct layout, val0, &reg));

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