Searched refs:sr (Results 1 - 25 of 88) sorted by relevance

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/u-boot/arch/m68k/lib/
H A Dinterrupts.c31 unsigned short sr; local
33 asm volatile ("move.w %%sr,%0":"=r" (sr):);
35 return sr;
38 static __inline__ void set_sr (unsigned short sr) argument
40 asm volatile ("move.w %0,%%sr"::"r" (sr));
71 unsigned short sr; local
73 sr = get_sr ();
74 set_sr (sr
79 unsigned short sr; local
[all...]
/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dtie.h46 * base = reg shortname w/o index (or sr=special, ur=TIE user reg)
48 * bitsz = number of significant bits (regfile width, or ur/sr mask bits)
50 * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
69 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
70 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
71 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0) \
72 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
73 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
74 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
75 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,3
[all...]
/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dtie.h69 * base = reg shortname w/o index (or sr=special, ur=TIE user reg)
71 * bitsz = number of significant bits (regfile width, or ur/sr mask bits)
73 * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
92 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
93 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
94 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
95 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
96 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
97 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \
98 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,1
[all...]
/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dtie.h69 * base = reg shortname w/o index (or sr=special, ur=TIE user reg)
71 * bitsz = number of significant bits (regfile width, or ur/sr mask bits)
73 * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize)
93 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
94 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
95 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
96 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
97 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
98 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \
99 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,1
[all...]
/u-boot/arch/m68k/include/asm/
H A Dptrace.h31 unsigned short sr; member in struct:pt_regs
34 unsigned short sr; member in struct:pt_regs
/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pit.h17 u32 sr; /* 0x04 Status Register */ member in struct:at91_pit
H A Dat91_dbu.h21 u32 sr; /* Status Register RO */ member in struct:at91_dbu
H A Dat91_st.h15 u32 sr; member in struct:at91_st
H A Dat91_rstc.h23 u32 sr; /* Reset Controller Status Register */ member in struct:at91_rstc
H A Dat91_wdt.h25 u32 sr; member in struct:at91_wdt
/u-boot/drivers/rng/
H A Dstm32_rng.c93 u32 sr = readl_relaxed(pdata->base + RNG_SR); local
97 if (sr & RNG_SR_SECS) {
103 writel_relaxed(sr & ~RNG_SR_SEIS, pdata->base + RNG_SR);
107 err = readl_relaxed_poll_timeout(pdata->base + RNG_SR, sr, !(sr & RNG_CR_CONDRST), 100000);
109 log_err("%s: timeout %x\n", __func__, sr);
117 err = readl_relaxed_poll_timeout(pdata->base + RNG_SR, sr, !(sr & RNG_SR_SECS), 100000);
119 log_err("%s: timeout %x\n", __func__, sr);
144 u32 sr local
170 u32 sr, reg; local
255 u32 cr, sr; local
[all...]
/u-boot/arch/arc/lib/
H A Dstart.S14 sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
25 sr r5, [ARC_AUX_IC_CTRL]
28 sr r5, [ARC_AUX_IC_IVIC]
46 sr r5, [ARC_AUX_DC_CTRL]
49 sr r5, [ARC_AUX_DC_IVDC]
60 sr r5, [ARC_AUX_SLC_CTRL]
76 sr r5, [ARC_AUX_DSP_CTRL]
136 sr %r0, [ARC_AUX_INTR_VEC_BASE]
/u-boot/drivers/mtd/
H A Dstm32_flash.h5 u32 sr; member in struct:stm32_flash_regs
H A Dstm32_flash.c98 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
117 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
131 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
144 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY)
/u-boot/arch/arm/mach-at91/
H A Dspl_at91.c38 if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) {
43 while (!(readl(&pmc->sr) & AT91_PMC_MOSCS))
55 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
61 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
H A Dphy.c43 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
/u-boot/drivers/spi/
H A Dstm32_qspi.c31 u32 sr; /* 0x08 */ member in struct:stm32_qspi_regs
129 u32 sr; local
132 ret = readl_poll_timeout(&priv->regs->sr, sr,
133 !(sr & STM32_QSPI_SR_BUSY),
136 log_err("busy timeout (stat:%#x)\n", sr);
144 u32 sr; local
147 ret = readl_poll_timeout(&priv->regs->sr, sr,
148 sr
181 u32 len = op->data.nbytes, sr; local
[all...]
H A Dstm32_spi.c160 u32 sr = readl(base + STM32_SPI_SR); local
161 u32 rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
164 ((sr & SPI_SR_RXP) ||
165 ((sr & SPI_SR_EOT) && ((sr & SPI_SR_RXWNE) || (rxplvl > 0))))) {
169 (priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) {
176 (!(sr & SPI_SR_RXWNE) &&
189 sr = readl(base + STM32_SPI_SR);
190 rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
244 u32 cr1, sr; local
393 u32 sr; local
[all...]
/u-boot/arch/m68k/include/asm/coldfire/
H A Drng.h15 u32 sr; /* 0x04 Status */ member in struct:rng_ctrl
/u-boot/arch/sh/include/asm/
H A Dptrace.h56 unsigned long sr; member in struct:pt_regs
88 #define user_mode(regs) (((regs)->sr & 0x40000000)==0)
/u-boot/arch/arm/mach-at91/arm926ejs/
H A Dclock.c208 while (!(readl(&pmc->sr) & AT91_PMC_LOCKA))
216 while (!(readl(&pmc->sr) & AT91_PMC_LOCKB))
229 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
236 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
243 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
250 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
261 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
279 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
/u-boot/arch/mips/mach-octeon/
H A Dcvmx-helper-cfg.c828 struct cvmx_srio_port_param *sr; local
853 sr = &pcfg->srio_short;
854 sr->srio_rx_ctle_agc_override = false;
855 sr->srio_rx_ctle_zero = 0x6;
856 sr->srio_rx_agc_pre_ctle = 0x5;
857 sr->srio_rx_agc_post_ctle = 0x4;
858 sr->srio_tx_swing_override = false;
859 sr->srio_tx_swing = 0x7;
860 sr->srio_tx_premptap_override = false;
861 sr
[all...]
/u-boot/drivers/i2c/
H A Dat91_i2c.c30 u32 sr; local
35 sr = readl(&reg->sr);
36 bus->status |= sr;
38 if (sr & TWI_SR_NACK)
40 else if (sr & status)
58 readl(&reg->sr);
/u-boot/drivers/rtc/
H A Drv3029.c219 u8 sr; local
222 ret = rv3029_get_sr(dev, &sr);
225 if (!(sr & RV3029_STATUS_EEBUSY))
268 u8 sr; local
271 ret = rv3029_get_sr(dev, &sr);
274 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
278 sr &= ~RV3029_STATUS_VLOW1;
279 sr &= ~RV3029_STATUS_VLOW2;
280 ret = rv3029_set_sr(dev, sr);
284 ret = rv3029_get_sr(dev, &sr);
[all...]
/u-boot/arch/powerpc/include/asm/
H A Dfsl_dma.h31 uint sr; /* DMA status register */ member in struct:fsl_dma
70 uint sr; /* DMA status register */ member in struct:fsl_dma

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