Searched refs:sdr_cycle_incr (Results 1 - 1 of 1) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_leveling.c1730 int rl_adll_val, rl_phase_val, sdr_cycle_incr, rd_sample, rd_ready; local
1849 sdr_cycle_incr = i / TAPS_PER_RD_SAMPLE; /* sdr cycle increment */
1850 rd_sample = cl_val + 2 * sdr_cycle_incr;
1862 sdr_cycle_incr = i % TAPS_PER_RD_SAMPLE;
1863 rl_adll_val = sdr_cycle_incr % MAX_RD_SAMPLES;
1864 rl_phase_val = sdr_cycle_incr / MAX_RD_SAMPLES;
2016 sdr_cycle_incr = i / TAPS_PER_RD_SAMPLE; /* sdr cycle increment */
2017 rd_sample = cl_val + 2 * sdr_cycle_incr;
2019 min_phase = (rl_min_val[effective_cs] - (sdr_cycle_incr * TAPS_PER_RD_SAMPLE)) % MAX_RD_SAMPLES;
2020 max_phase = (rl_max_val[effective_cs] - (sdr_cycle_incr * TAPS_PER_RD_SAMPL
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