Searched refs:sample (Results 1 - 9 of 9) sorted by relevance
/u-boot/drivers/net/octeon/ |
H A D | octeon_mdio.c | 170 /* Allow sample delay to be specified */ 171 sample_dly = dev_read_u32_default(dev, "cavium,sample-delay", 0); 172 /* Only change the sample delay if it is set, otherwise use 176 u32 sample; local 181 sample = (sclock + denom - 1) / denom; 182 debug("%s: sample: %u\n", __func__, smi_clk.s.sample); 183 if (sample < 2) { 184 printf("%s: warning: cavium,sample-delay %u ps is too small in device tree for %s\n", 186 sample [all...] |
/u-boot/drivers/serial/ |
H A D | serial_cortina.c | 68 unsigned int uart_ctrl, baud, sample; local 77 sample = baud / 2; 78 sample = (sample < 7) ? 7 : sample; 79 writel(sample, priv->base + URX_SAMPLE);
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/u-boot/drivers/rtc/ |
H A D | armada38x.c | 68 u32 sample = readl(rtc->regs + reg); local 72 if (samples[j] == sample) 81 samples[last] = sample; 87 /* finally find the sample that was read the most */
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/u-boot/drivers/rng/ |
H A D | smccc_trng.c | 60 u32 sample = *rnd; local 62 memcpy(*ptr, &sample, len); 71 u64 sample = *rnd; local 73 memcpy(*ptr, &sample, len);
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/u-boot/arch/x86/cpu/quark/ |
H A D | mrc_util.c | 1017 * This function will sample the DQTRAINSTS registers in the given 1032 /* DQTRAINSTS register contents for each sample */ 1095 uint8_t sample; /* sample counter */ local 1109 /* Take 3 sample points (T1,T2,T3) to obtain a transition pattern */ 1110 for (sample = 0; sample < SAMPLE_CNT; sample++) { 1111 /* program the desired delays for sample */ 1113 /* increase sample dela [all...] |
/u-boot/arch/mips/mach-octeon/include/mach/ |
H A D | cvmx-smix-defs.h | 145 u64 sample : 4; member in struct:cvmx_smix_clk::cvmx_smix_clk_s 155 u64 sample : 4; member in struct:cvmx_smix_clk::cvmx_smix_clk_cn30xx
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/u-boot/drivers/net/octeontx/ |
H A D | smi.c | 41 int sample:4; member in struct:smi_x_clk::smi_x_clk_s
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/u-boot/drivers/mmc/ |
H A D | octeontx_hsmmc.c | 3084 union mio_emm_sample sample; local 3086 sample.u = 0; 3087 sample.s.cmd_cnt = slot->cmd_clk_skew; 3088 sample.s.dat_cnt = slot->dat_clk_skew; 3089 write_csr(mmc, MIO_EMM_SAMPLE(), sample.u);
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/u-boot/drivers/ram/octeon/ |
H A D | octeon3_lmc.c | 55 * allow looking for the best sample score 2709 static int sample __section(".data"); 4275 for (sample = 0; sample < num_samples; sample++) { 4292 // read and maybe display the DAC values for a sample 4316 // try another sample 4323 // good sample or exhausted retries, 4327 lanes[lane].bytes[sample] = 4332 // done if DDR3, or good sample, o [all...] |
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