Searched refs:rd_sample (Results 1 - 1 of 1) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_leveling.c | 1730 int rl_adll_val, rl_phase_val, sdr_cycle_incr, rd_sample, rd_ready; local
1850 rd_sample = cl_val + 2 * sdr_cycle_incr;
1852 rd_ready = rd_sample + RD_FIFO_DLY;
1855 rd_sample << RD_SMPL_DLY_CS_OFFS(effective_cs),
2017 rd_sample = cl_val + 2 * sdr_cycle_incr;
2018 rd_ready = rd_sample + RD_FIFO_DLY;
2021 final_rd_sample = rd_sample;
2025 rd_sample << RD_SMPL_DLY_CS_OFFS(effective_cs),
2032 __func__, effective_cs, min_phase, max_phase, rd_sample));
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