Searched refs:ratio_2to1 (Results 1 - 5 of 5) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c46 int ratio_2to1, u32 ecc,
50 int ratio_2to1, u32 ecc,
180 int ddr3_read_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) argument
231 if (!ratio_2to1) {
246 ratio_2to1,
254 ratio_2to1,
401 int ratio_2to1, u32 ecc,
519 if ((!ratio_2to1) && ((phase == 0) || (phase == 4)))
532 if ((!ratio_2to1 && phase ==
534 || (ratio_2to1
400 ddr3_read_leveling_single_cs_rl_mode(u32 cs, u32 freq, int ratio_2to1, u32 ecc, MV_DRAM_INFO *dram_info) argument
752 ddr3_read_leveling_single_cs_window_mode(u32 cs, u32 freq, int ratio_2to1, u32 ecc, MV_DRAM_INFO *dram_info) argument
[all...]
H A Dddr3_dfs.c54 u32 ddr3_get_freq_parameter(u32 target_freq, int ratio_2to1);
87 u32 ddr3_get_freq_parameter(u32 target_freq, int ratio_2to1) argument
97 if (ratio_2to1)
769 int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) argument
780 freq_par = ddr3_get_freq_parameter(freq, ratio_2to1);
938 if (ratio_2to1) {
951 if (ratio_2to1) {
1036 if (ratio_2to1) {
1207 freq_par = ddr3_get_freq_parameter(freq, ratio_2to1);
1258 if (ratio_2to1) {
[all...]
H A Dddr3_hw_training.h356 int ddr3_read_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info);
359 int ddr3_write_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info);
364 int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info);
H A Dddr3_write_leveling.c48 static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1,
659 int ddr3_write_leveling_sw(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) argument
770 ddr3_write_leveling_single_cs(cs, freq, ratio_2to1,
883 int ddr3_write_leveling_sw_reg_dimm(u32 freq, int ratio_2to1, argument
1011 ddr3_write_leveling_single_cs(cs, freq, ratio_2to1,
1126 static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1, argument
1193 if (!ratio_2to1) {
1215 if (!ratio_2to1) /* Different phase options for 2:1 or 1:1 modes */
1238 if (!ratio_2to1) {
H A Dddr3_hw_training.c87 int ratio_2to1 = 0; local
173 ratio_2to1 = 1;
287 tmp_ratio = ratio_2to1;

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