| /u-boot/arch/riscv/include/asm/ |
| H A D | io.h | 225 unsigned char *ptr2; local
228 ptr2 = (unsigned char *)data;
231 *ptr2 = *ptr;
232 ptr2++;
241 unsigned short *ptr2; local
244 ptr2 = (unsigned short *)data;
247 *ptr2 = *ptr;
248 ptr2++;
257 unsigned int *ptr2; local
260 ptr2
273 unsigned char *ptr2; local
289 unsigned short *ptr2; local
305 unsigned int *ptr2; local
[all...] |
| /u-boot/board/ti/ks2_evm/ |
| H A D | ddr3_cfg.c | 20 .ptr2 = 0, /* not set in gel */
|
| H A D | ddr3_k2g.c | 22 .ptr2 = 0,
62 .ptr2 = 0,
123 .ptr2 = 0,
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| /u-boot/arch/arm/mach-keystone/include/mach/ |
| H A D | ddr3.h | 20 unsigned int ptr2; member in struct:ddr3_phy_config
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| /u-boot/lib/ |
| H A D | hexdump.c | 79 const u16 *ptr2 = buf; local
84 get_unaligned(ptr2 + j));
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| /u-boot/arch/arm/mach-sunxi/ |
| H A D | dram_sun50i_h616.c | 413 u32 val1, val2, *ptr1, *ptr2; local
442 ptr2 = (u32 *)(SUNXI_DRAM_PHY0_BASE + 0x850);
445 val2 = readl(&ptr2[i]);
450 ptr2 = (u32 *)(SUNXI_DRAM_PHY0_BASE + 0x874);
453 val2 = readl(&ptr2[i]);
460 ptr2 = (u32 *)(SUNXI_DRAM_PHY0_BASE + 0xa50);
463 val2 = readl(&ptr2[i]);
469 ptr2 = (u32 *)(SUNXI_DRAM_PHY0_BASE + 0xa74);
472 val2 = readl(&ptr2[i]);
507 u32 val1, val2, *ptr1, *ptr2; local
[all...] |
| H A D | dram_sun6i.c | 132 writel((MCTL_TDINIT3 << 17) | MCTL_TDINIT2, &mctl_phy->ptr2);
|
| H A D | dram_sun8i_a23.c | 131 writel((dram_para.tpr0 & 0x000fffff), &mctl_phy->ptr2);
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| /u-boot/lib/efi/ |
| H A D | efi_stub.c | 277 * @ptr2: Pointer to second data block to add
281 void *ptr1, int size1, void *ptr2, int size2)
291 memcpy((void *)(hdr + 1) + size1, ptr2, size2);
280 add_entry_addr(struct efi_priv *priv, enum efi_entry_t type, void *ptr1, int size1, void *ptr2, int size2) argument
|
| /u-boot/drivers/ram/stm32mp1/ |
| H A D | stm32mp1_ddr.h | 133 u32 ptr2; member in struct:stm32mp1_ddrphy_timing
|
| H A D | stm32mp1_ddr_regs.h | 151 u32 ptr2; /* 0x20 R/W PHY Timing 2*/ member in struct:stm32mp1_ddrphy
|
| H A D | stm32mp1_ddr.c | 173 DDRPHY_REG_TIMING(ptr2),
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| /u-boot/board/imgtec/ci20/ |
| H A D | ci20.c | 299 .ptr2 = 0x04013880,
343 .ptr2 = 0x04013880,
|
| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | dram_sun8i_a23.h | 172 u32 ptr2; /* 0x24 */ member in struct:sunxi_mctl_phy_reg
|
| H A D | dram_sun8i_a83t.h | 85 u32 ptr2; /* 0x4c */ member in struct:sunxi_mctl_ctl_reg
|
| H A D | dram_sun8i_a33.h | 85 u32 ptr2; /* 0x4c */ member in struct:sunxi_mctl_ctl_reg
|
| H A D | dram_sun6i.h | 169 u32 ptr2; /* 0x20 */ member in struct:sunxi_mctl_phy_reg
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| /u-boot/arch/mips/mach-jz47xx/jz4780/ |
| H A D | sdram.c | 84 writel(ddr_config->ptr2, ddr_phy_regs + DDRP_PTR2);
|
| /u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 27 debug_ddr_cfg("ptr2 0x%08X\n", ptr->ptr2);
312 spd_cb->phy_cfg.ptr2 = 0;
|
| /u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780_dram.h | 443 u32 ptr2; /* PHY Timing Register 1 */ member in struct:jz4780_ddr_config
|