Searched refs:port_cfg (Results 1 - 12 of 12) sorted by relevance

/u-boot/arch/mips/mach-octeon/
H A Dcvmx-helper-npi.c94 union cvmx_pip_prt_cfgx port_cfg; local
105 port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(ipd_port));
106 port_cfg.s.lenerr_en = 0;
107 port_cfg.s.maxerr_en = 0;
108 port_cfg.s.minerr_en = 0;
109 csr_wr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64);
H A Dcvmx-helper-loop.c76 cvmx_pip_prt_cfgx_t port_cfg; local
95 port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(offset));
96 port_cfg.s.maxerr_en = 0;
97 port_cfg.s.minerr_en = 0;
98 csr_wr(CVMX_PIP_PRT_CFGX(offset), port_cfg.u64);
H A Dcvmx-helper-pki.c459 * @param port_cfg pointer to structure where to store read parameters
462 struct cvmx_pki_port_config *port_cfg)
474 cvmx_pki_read_pkind_config(xp.node, pknd, &port_cfg->pkind_cfg);
475 style = port_cfg->pkind_cfg.initial_style;
477 xp.node, CVMX_PKI_ICGX_CFG(port_cfg->pkind_cfg.cluster_grp));
480 &port_cfg->style_cfg);
487 * @param port_cfg pointer to structure containing port parameters
490 struct cvmx_pki_port_config *port_cfg)
502 if (cvmx_pki_write_pkind_config(xp.node, pknd, &port_cfg->pkind_cfg))
504 style = port_cfg
461 cvmx_pki_get_port_config(int xipd_port, struct cvmx_pki_port_config *port_cfg) argument
489 cvmx_pki_set_port_config(int xipd_port, struct cvmx_pki_port_config *port_cfg) argument
[all...]
H A Dcvmx-helper-ipd.c115 union cvmx_pip_prt_cfgx port_cfg; local
139 port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(pknd));
140 port_cfg.s.crc_en = (has_fcs) ? 1 : 0;
141 csr_wr(CVMX_PIP_PRT_CFGX(pknd), port_cfg.u64);
/u-boot/drivers/net/
H A Dmt7620-eth.c262 struct mt7620_gsw_port_cfg port_cfg[3]; member in struct:mt7620_eth_priv
563 if (priv->port_cfg[0].phy_addr > 0)
564 mt7620_phy_restart_an(priv, priv->port_cfg[0].phy_addr);
566 if (priv->port_cfg[1].phy_addr > 0)
567 mt7620_phy_restart_an(priv, priv->port_cfg[1].phy_addr);
619 struct mt7620_gsw_port_cfg *port_cfg)
623 if (port_cfg->mode == PHY_INTERFACE_MODE_NA) {
629 port_cfg->force_mode = port == CPU_PORT_NUM ? true : false;
635 if (port_cfg->force_mode) {
637 FIELD_PREP(FORCE_SPEED, port_cfg
618 mt7620_gsw_setup_port(struct mt7620_eth_priv *priv, u32 port, struct mt7620_gsw_port_cfg *port_cfg) argument
[all...]
/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-pip.h390 * @param port_cfg Port hardware configuration
393 static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_cfg, argument
408 if (port_cfg.s.ih_pri || port_cfg.s.vlan_len || port_cfg.s.pad_len)
410 pki_prt_cfg.style_cfg.parm_cfg.minmax_sel = port_cfg.s.len_chk_sel;
411 pki_prt_cfg.style_cfg.parm_cfg.lenerr_en = port_cfg.s.lenerr_en;
412 pki_prt_cfg.style_cfg.parm_cfg.maxerr_en = port_cfg.s.maxerr_en;
413 pki_prt_cfg.style_cfg.parm_cfg.minerr_en = port_cfg.s.minerr_en;
414 pki_prt_cfg.style_cfg.parm_cfg.fcs_chk = port_cfg
[all...]
H A Dcvmx-helper-pki.h218 * @param port_cfg pointer to structure where to store read parameters
220 void cvmx_pki_get_port_config(int xipd_port, struct cvmx_pki_port_config *port_cfg);
226 * @param port_cfg pointer to structure containing port parameters
228 void cvmx_pki_set_port_config(int xipd_port, struct cvmx_pki_port_config *port_cfg);
/u-boot/drivers/phy/rockchip/
H A Dphy-rockchip-inno-usb2.c99 const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); local
101 property_enable(priv->reg_base, &port_cfg->phy_sus, false);
113 const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); local
115 property_enable(priv->reg_base, &port_cfg->phy_sus, true);
/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h50 u32 port_cfg; member in struct:socfpga_sdr_ctrl
101 u32 port_cfg; member in struct:socfpga_sdram_config
/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c139 .port_cfg =
/u-boot/drivers/ddr/altera/
H A Dsdram_gen5.c391 writel(cfg->port_cfg, &sdr_ctrl->port_cfg);
/u-boot/include/
H A Dvsc9953.h124 /* Macros for vsc9953_ana_port.port_cfg register */
279 u32 port_cfg; member in struct:vsc9953_ana_port

Completed in 138 milliseconds