Searched refs:pll_cfg1 (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock_imx8mq.c24 u32 pll_cfg0, pll_cfg1, pllout; local
32 pll_cfg1 = readl(&ana_pll->arm_pll_cfg1);
70 divff = (pll_cfg1 & FRAC_PLL_FRAC_DIV_CTL_MASK) >>
72 divfi = pll_cfg1 & FRAC_PLL_INT_DIV_CTL_MASK;
84 u32 pll_cfg0, pll_cfg1, pll_cfg2; local
103 pll_cfg1 = readl(&ana_pll->sys_pll1_cfg1);
118 pll_cfg1 = readl(&ana_pll->sys_pll2_cfg1);
125 pll_cfg1 = readl(&ana_pll->sys_pll3_cfg1);
132 pll_cfg1 = readl(&ana_pll->dram_pll_cfg1);
238 sse = pll_cfg1
695 void __iomem *pll_cfg0, __iomem *pll_cfg1; local
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