Searched refs:mode_shift (Results 1 - 4 of 4) sorted by relevance
| /u-boot/drivers/power/regulator/ |
| H A D | max77686.c | 539 unsigned int mask, adr, mode, mode_shift; local
556 mode_shift = MAX77686_BUCK_MODE_SHIFT_2;
559 mode_shift = MAX77686_BUCK_MODE_SHIFT_1;
562 mask = MAX77686_BUCK_MODE_MASK << mode_shift;
570 val >>= mode_shift; local
589 mode = MAX77686_BUCK_MODE_STANDBY << mode_shift;
600 mode = MAX77686_BUCK_MODE_LPM << mode_shift;
607 mode = MAX77686_BUCK_MODE_ON << mode_shift;
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | clock.h | 54 .mode_shift = _mshift, \
114 unsigned int mode_shift; member in struct:rockchip_pll_clock
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| /u-boot/drivers/clk/rockchip/ |
| H A D | clk_pll.c | 314 pll->mode_mask << pll->mode_shift,
315 RKCLK_PLL_MODE_SLOW << pll->mode_shift);
349 rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
350 RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
368 shift = pll->mode_shift;
451 pll->mode_mask << pll->mode_shift,
452 RKCLK_PLL_MODE_SLOW << pll->mode_shift);
494 rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
495 RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
554 shift = pll->mode_shift;
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| H A D | clk_rk3328.c | 218 u32 mode_shift, mode_mask; local
221 mode_shift = 0;
225 mode_shift = APLL_MODE_SHIFT;
229 mode_shift = DPLL_MODE_SHIFT;
233 mode_shift = CPLL_MODE_SHIFT;
237 mode_shift = GPLL_MODE_SHIFT;
241 mode_shift = NPLL_MODE_SHIFT;
246 mode_mask = 1 << mode_shift;
264 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift);
284 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift);
[all...] |
Completed in 152 milliseconds